Formal Verification Engineer

About us: Axiomise is the world’s only formal verification (FV) training, consulting, services and custom

solutions company. In its 8th year, we have delivered training to over a hundred engineers globally and provided our consulting & services to some of the best names in the semiconductor industry. We designed the industry’s first and only vendor-neutral fully automated RISC-V formal verification app that has been used to find bugs in pre-existing processors and exhaustively prove bug absence. We love formal methods, and we use them

day and night to sign-off designs, so our customers do not leave bugs in silicon.

Snapshot of our culture: We do not have a hierarchical structure so you will learn fast. We focus on innovation and every individual is invited to build cool new solutions, publish papers, file patents, and work live with customers.

We are an equal opportunity employer, having a representation of 11 nationalities and 41% female employees.

We are looking for bright spirited individuals with a positive can-do attitude. We often work on very challenging problems that are not always solvable within a 9-to-5 framework, so we expect our team to put in extra hours if needed.

We welcome our engineering talent to also get involved in other areas of our business and we take pride that we are agile and can respond swiftly to our customer and employee needs.

About the Job:

We are looking to hire top-notch engineering talent for the UK. Your typical day job would involve building cutting-edge formal verification testbench environments to find bugs and build proofs of bug absence in SoCs containing processors, video/GPUs, networking, AI/ML designs. Formal verification is the only way to generate proofs of correctness and build proofs of bug absence. We train engineers in the best-known semiconductor names, and you can assume that we will provide you with the best FV training to get you started. All we expect from you is a passion for digital design, computer architecture and problem-solving.

There is a substantial amount of hands-on work on formal verification of processors, GPU blocks, networking designs or AI/ML. The work will include building strategy, verification plans, testbenches and sign-off using the Axiomise six-dimensional coverage methodology.

You are expected to be confident in Verilog/VHDL as well as fluent in SVA and Tcl/Perl/Python and Unix/Linux scripting.

Profile of a successful candidate:

Education

Bachelor/Masters/Doctorate in EEE/ECE/CS/Maths

Technical Skills:

Linux/Unix

Verilog/VHDL design

Open-source projects in design/verification

RISC-V/Arm/x86/MIPS

SVA/PSL/Theorem proving

Tcl/Python/Bash

Soft Skills

Problem solving

Ownership

Autonomy

Team spirit

Attention to detail

Language skills: English

Experience:

0-5/6-8/9-10 years

Once hired by us, the company offers compensation based on prevailing market rates and a generous package of benefits, such as:

Benefits

Company Pension

Private Healthcare

Employee Assistance Programme

Eye Test Vouchers

Cycle to Work Scheme

Employee Birthday treat

Employee Recognition Awards

Employee Coffee Mornings

Bonus System

Potential to file patents, publish papers at top conferences

Social and wellbeing events

Flexible Working Hours

Hiring process

As a process, our recruitment follows 4 stages:

1. Pre-screening call

2.Technical (panel) interview

3. HR interview.

4. Leadership call