Lead FPGA Engineer

Job Title: FPGA Team Lead / Principal

Location: United Kingdom

Clearance Required: Must be eligible for SC cLEARANCE

Contract Type: Permanent / Full-Time

Department: Electronic Systems & Architecture

About the Role

La Fosse is recruiting an experienced FPGA Team Lead/Principal to support the development of next-generation digital mission systems for advanced land platforms. This is a senior technical leadership role where you will lead a multidisciplinary team of FPGA and embedded engineers, define digital architectures, and drive delivery of secure, safety-critical hardware solutions across the full development lifecycle.

Key Responsibilities

• Lead the design, development, and verification of FPGA solutions for vehicle-based mission systems (comms, control, sensor integration, etc.)
• Architect and own digital logic subsystems using platforms such as Xilinx Zynq Ultrascale+, Intel Stratix, etc.
• Act as Technical Authority for FPGA content on key programmes
• Manage and mentor a team of engineers across design, simulation, integration, and test
• Collaborate with embedded software, systems, safety, and cyber teams to ensure end-to-end integrity
• Ensure compliance with MOD standards (DEF STAN 00-55, 00-56) and relevant safety/security requirements
• Define development plans, estimates, and risk registers; support project managers with planning and delivery assurance
• Drive best practice adoption in VHDL/Verilog design, testbenches, and configuration management
• Lead design and gate reviews, customer technical briefings, and acceptance activities
• Promote continuous improvement, IP reuse, and skills development within the digital engineering team

Essential Skills & Experience

• Extensive experience in FPGA/SoC design using VHDL or Verilog in a defence, aerospace, or high-integrity environment
• Proven track record of leading small to medium FPGA teams, including mentorship and delivery ownership
• Strong working knowledge of FPGA tools such as Vivado, ModelSim, Synplify, Quartus
• Proficient in digital architecture design, timing analysis, constraints, and simulation workflows
• Experience with high-speed protocols and interfaces: AXI, SPI, Ethernet, PCIe, DDR
• Familiar with defence standards (DEF STANs, DO-254) and secure development practices
• Excellent communication and leadership skills; ability to interface with MoD, customers, and internal stakeholders
• UK national, eligible for Security Clearance (SC)

Desirable Qualifications & Experience

• Background in land systems, armoured vehicles, or real-time mission systems
• Experience with DOORS, Jira, GitLab, or configuration-managed environments
• Working knowledge of UVM/SystemVerilog verification methodologies
• Exposure to safety and cyber security integration in FPGA designs
• Line management experience (or aspirations to move into a formal management path)