Senior Design Verification Engineer – IP/SOC

Location: EU / Remote

Duration: 12 Months

Work Authorization: Citizen or Work Permit holders

Education: B.Tech / M.Tech in Electronics, Electrical, or related field

Interview Mode: Video Conference

About HCL Technologies

HCL-Technologies is a cutting-edge semiconductor solutions provider, driving innovation in IP and SOC design and verification. We are seeking a highly experienced Design Verification Engineer to join our dynamic team and contribute to the development of next-Generation systems.

Key Responsibilities

• Lead and manage verification activities for complex SOC designs.
• Collaborate with cross-functional teams to ensure high-quality deliverables.
• Develop and execute test plans, testbenches, and verification environments using System Verilog/UVM.
• Perform functional and code coverage analysis to ensure verification completeness.
• Debug and resolve issues in SOC environments, guiding junior engineers in problem-solving.
• Work with ARM processors, CHI protocols, and hands-on experience with PCIe or DDR interfaces.
• Coordinate effectively between onsite and offshore teams.

Mandatory Skills

Skill

Expertise Level

IP/SOC Verification

Expert

Verilog, System Verilog, UVM

Expert

Code Coverage, Functional Coverage

Expert

Ideal Candidate Profile

• Industry Experience: 10+ years in Design Verification.
• Proven ability to lead teams and deliver high-quality results.
• Strong understanding of SOC verification methodologies and flows.
• Excellent communication and interpersonal skills.
• Experience in test development and simulation.