Sr Chip Design Engineer
Company
Location
London, England, United Kingdom
Posted At
7/18/2025
Advertise with us by contacting: [email protected]
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Description
Minimum Qualifications
Senior Chip Designer (ASIC / RTL):
Senior Chip Designer (ASIC / RTL):
- Bachelor's degree or equivalent practical experience.
- Experience architecting networking Blocks/ASICs from specification to fully verify delivery.
- Experience working with design networking like: packet processing and system design principles for low latency, high throughput, security, and reliability.
- Experience developing RTL for ASIC subsystems.
- Experience in micro-architecture, design, verification. Logic synthesis, and timing closure is an advantage
- Networking logic design expertise, including data path IPs and third-party IPs (e.g., SerDes, PCS, MAC).
- Deep understanding of networking protocols and principles (e.g., TCP, IP, Ethernet, PCIe).
- Proven ability to optimize hardware/software interfaces through collaboration with software teams.
- Experience in Micro Architecture of networking solutions such as switches, NICs and endpoints.
- [Optional] Proficiency in a procedural programming language (e.g., C++, Python, Go).
- Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
Advertise with us by contacting: [email protected]
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