Hardware Design Engineer
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Contract Hardware Designer
Security clearance essential
Fully remote in the U.K (Hampshire HQ)
Up to £52 p/h Inside IR35
We are seeking a talented and experienced Hardware Designer with live security clearance to join our growing team in Hampshire. This is an exciting opportunity for an engineer with strong analogue and mixed-signal IC layout expertise to contribute to the development of complex integrated circuit designs within a collaborative and innovative environment
.The ideal candidate will possess a formal qualification in Electronics, Microelectronics, Semiconductor Engineering, or a related discipline, together with several years of hands-on experience delivering complex IC layouts. Experience with CMOS Readout ICs or imaging devices would be highly advantageous
.About the Rol
eAs part of our mixed-signal IC design team, you will work at transistor, cell, and block level, translating schematic designs into robust and efficient layout solutions. You will be responsible for delivering high-quality layouts that meet both technical specifications and project timelines while adhering to industry best practices
.
Key Responsibiliti
- esDevelop IC layouts in accordance with design specifications and project requirement
- s.Apply and promote layout best practices to ensure optimal performance, manufacturability, and reliabilit
- y.Create bespoke analogue, digital, and mixed-signal layout design
- s.Perform DRC (Design Rule Check) and LVS (Layout Versus Schematic) verification at transistor and block leve
- l.Collaborate closely with IC design engineers to optimise layout implementation and resolve design challenge
- s.Support the successful delivery of projects within agreed schedule
s.
Essent
- ialStrong analogue and mixed-signal IC layout experien
- ce.Several years of experience working on complex IC desig
- ns.Proven ability to complete custom analogue, digital, and mixed-signal layou
- ts.Experience performing DRC and LVS verificati
- on.Strong understanding of semiconductor layout methodologies and best practic
- es.Experience with CMOS Readout I
- Cs.Image sensor or pixel design experien
- ce.Top-level verification experien
- ce.Exposure to a broad range of semiconductor technology nod
- es.Experience working on imaging or sensor-based IC produc
ts.