Senior PIC Design Engineer

CompanyOriole

LocationLondon Area, United Kingdom

Posted At3/13/2026

UK Visa Sponsorship Analytics

Occupation Type

Engineering professionals not elsewhere classified.

Occupation Code Skill LevelHigher Skilled

Sponsorship Salary Threshold

£46,100 (£23.64 per hour)

Occupation rate applies

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Description

At Oriole Networks, we are developing disruptive technologies for AI/ML and HPC networking that will revolutionise Data Centers. These technologies will speed up training and inference while dramatically reducing energy consumption for a sustainable future.

Key Responsibilities:

Drive the design and simulation activity of passive and active components within the Oriole PDK.
Lead the design customisation of high performance photonic building blocks within a commercial foundry PDK.
Work collaboratively within the Oriole PIC team on mask layout and support tape-out cycles into a commercial foundry.
Compose, analyse and deliver design specifications and other documentation within the Oriole Photonics supply chain.
Support collaborative activities between Oriole and its suppliers.
Provide analysis and drive parts of Oriole's technology roadmap.
Drive Test development and data analysis activities.

Essential Skills:

PhD in Physics with a focus on Photonics, Semiconductors or Optical Networks.
+3 years of relevant professional experience in Photonics Industry or academia.

Strong simulation skills in photonics (FDTD, EME) and hands on experience with commercial relevant software.

In depth knowledge of device physics and design of III-V semiconductor optical devices such as lasers, optical amplifiers, modulators and detectors.

In depth understanding of photonic process integration and understanding of processing limitations on PIC performance (principles of design for manufacture).

Hands on experience with III-V epitaxial layer design using commercial or self-developed tools.

Experience on designing high speed optical devices such as modulators and detectors for high baud rates and multi-level modulation formats.

Strong Layout/Mask Design skills using commercial photonic layout tools (e.g. Synopsys, GDS Factory, Nazca, Klayout).

Good understanding of Photonic device manufacturing principles, Design for manufacture, Design for test and reliability.

Strong programming skills (preferably Python), and familiar with version control methodology.

Desired Skills:

Photonic device characterisation, hands on experience with testing methodologies for wafer level and die level test.

High speed RF design characterisation.

RF simulation experience is a plus.

Use of ML/AI methodologies or other computational optimisation techniques in photonic design simulations a plus.

Good understanding of Optical networks and Applications of photonics for AI in data centres.

Good understanding of PIC parameter impact on system performance (e.g. such as BER, link budget, power penalties etc), any system modelling experience is a plus.

Excellent communication and presentation skills, team working.

Good understanding of photonics industry trends for AI (new materials).